JPS6124828B2 - - Google Patents
Info
- Publication number
- JPS6124828B2 JPS6124828B2 JP51143339A JP14333976A JPS6124828B2 JP S6124828 B2 JPS6124828 B2 JP S6124828B2 JP 51143339 A JP51143339 A JP 51143339A JP 14333976 A JP14333976 A JP 14333976A JP S6124828 B2 JPS6124828 B2 JP S6124828B2
- Authority
- JP
- Japan
- Prior art keywords
- iil
- diffusion
- planar transistor
- region
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000004519 manufacturing process Methods 0.000 claims description 10
- 239000004065 semiconductor Substances 0.000 claims description 10
- 238000000034 method Methods 0.000 claims description 8
- 239000012535 impurity Substances 0.000 claims description 6
- 238000002955 isolation Methods 0.000 claims description 4
- 239000000758 substrate Substances 0.000 claims description 3
- 238000009792 diffusion process Methods 0.000 description 26
- 230000010354 integration Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 238000002347 injection Methods 0.000 description 2
- 239000007924 injection Substances 0.000 description 2
- OQCFWECOQNPQCG-UHFFFAOYSA-N 1,3,4,8-tetrahydropyrimido[4,5-c]oxazin-7-one Chemical compound C1CONC2=C1C=NC(=O)N2 OQCFWECOQNPQCG-UHFFFAOYSA-N 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
- H10D84/65—Integrated injection logic
- H10D84/658—Integrated injection logic integrated in combination with analog structures
Landscapes
- Bipolar Transistors (AREA)
- Bipolar Integrated Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14333976A JPS5368585A (en) | 1976-12-01 | 1976-12-01 | Semiconductor integrated circuit device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14333976A JPS5368585A (en) | 1976-12-01 | 1976-12-01 | Semiconductor integrated circuit device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5368585A JPS5368585A (en) | 1978-06-19 |
| JPS6124828B2 true JPS6124828B2 (en]) | 1986-06-12 |
Family
ID=15336477
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14333976A Granted JPS5368585A (en) | 1976-12-01 | 1976-12-01 | Semiconductor integrated circuit device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5368585A (en]) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55160459A (en) * | 1979-05-31 | 1980-12-13 | Toshiba Corp | Semiconductor integrated circuit |
-
1976
- 1976-12-01 JP JP14333976A patent/JPS5368585A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5368585A (en) | 1978-06-19 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4087900A (en) | Fabrication of semiconductor integrated circuit structure including injection logic configuration compatible with complementary bipolar transistors utilizing simultaneous formation of device regions | |
| US4066473A (en) | Method of fabricating high-gain transistors | |
| US4379726A (en) | Method of manufacturing semiconductor device utilizing outdiffusion and epitaxial deposition | |
| JPH04266047A (ja) | 埋め込み層形成に相当するｓｏｉ型半導体装置の製造方法及び半導体装置 | |
| JPH06112493A (ja) | 縦方向電流によるパワーｍｏｓトランジスタを製造するための方法およびこの方法により製造したトランジスタ | |
| JPS62256465A (ja) | 集積半導体装置の製造方法 | |
| JPS62155552A (ja) | バイポ−ラ・トランジスタとｃｍｏｓトランジスタの同時製造方法 | |
| JPS62277745A (ja) | 半導体集積回路 | |
| KR940008566B1 (ko) | 반도체장치의 제조방법 | |
| US4118251A (en) | Process for the production of a locally high, inverse, current amplification in a planar transistor | |
| WO1997017726A1 (en) | Low collector resistance bipolar transistor compatible with high voltage integrated circuits | |
| US4136353A (en) | Bipolar transistor with high-low emitter impurity concentration | |
| JPS61113270A (ja) | モノリシックトランジスタ論理回路 | |
| JPS6124828B2 (en]) | ||
| US5001538A (en) | Bipolar sinker structure and process for forming same | |
| US5188971A (en) | Process for making a self-aligned bipolar sinker structure | |
| JPS60123062A (ja) | 半導体集積回路の製造方法 | |
| KR0121178B1 (ko) | 트랜지스터 제조방법 | |
| JPH09275154A (ja) | 半導体装置及びその製造方法 | |
| JP2830052B2 (ja) | 半導体装置の製造方法 | |
| JPH0345549B2 (en]) | ||
| JPH01244660A (ja) | Ｂｉ−ＣＭＯＳ半導体装置の製造方法 | |
| JPH01112763A (ja) | 半導体装置 | |
| JPS63164356A (ja) | 半導体集積回路の製造方法 | |
| JPS5854509B2 (ja) | 半導体装置の製造方法 |